Unity Semiconductor Limited Company Will Provide Application Engineering and Field Service Support to Local Customers
Hsinchu, Taiwan – May 8, 2018 – UnitySC, a leader in advanced inspection and metrology solutions, today announced the opening of its Asia subsidiary, Unity Semiconductor Limited Company (UnitySC Asia). The entity was established to deliver enhanced customer support for UnitySC’s growing installed base of inspection and metrology tools throughout the region. UnitySC Asia is headquartered at Tai-Yuan Hi-Tech Industrial Park, Jubei City, Hsinchu, Taiwan, and has field offices in Singapore, Korea, and Shanghai, as well as a presence in Japan.
April 17, 2018
Ait-Mahiout Brings Strong Track Record of Growth at Amkor Europe and Significant Operational Experience
Grenoble, France – April 17, 2018 – UnitySC, a leader in advanced inspection and metrology solutions for the semiconductor and related industries, today announced that its board of directors has appointed Kamel Ait-Mahiout as chief executive officer. He has also been elected to serve on UnitySC’s board. Following the company’s recent announcement of the acquisition of HSEB Dresden, GmbH, this appointment marks the next step of the company’s aggressive growth strategy for its process control solutions.
April 3, 2018
Time-domain Optical Coherence is the most robust solution for TSV depth, bow & warp and individual layer TTV of a stack measurement as each interface is detected in the right order over a larger range than spectral interferometry. The only limitation is the minimum measurable thickness due to the high coherence length of the IR LED source.
March 20, 2018
Grenoble, France – March 20, 2018 – UnitySC, a leader in advanced inspection and metrology solutions, today announced it acquired 100% of the shares of HSEB Dresden, GmbH (HSEB), a leading supplier in optical inspection, review and metrology for high-value semiconductor applications. Following the acquisition, the new entity’s extended line of leading-edge process control solutions will provide a unique and essential inspection and metrology capability to semiconductor manufacturers. Together, the entity’s offerings span substrate, front-end-of-line (FEOL) manufacturing, wafer-level packaging, 3D ICs and power semiconductors. Further, bringing together the two companies will strengthen worldwide customer support for all platforms.
Article published in Silicon Semiconductor (Volume 39, Issue 4 2017)
Thin and ultrathin ICs are in high demand, but yield that sacrifices reliability has little value. Inspection process control can be the solution, according to UnitySC. By Gilles Fresquet, CEO, UnitySC. Read the full article in page 40.
November 9, 2017
Francoise von Trapp (3D Incites) refers to UnitySC’s latest announcement in her coverage of IWLPC.
After reading the announcement of UnitySC’s opening of its new software development lab and customer support demo lab, I caught up with the Philippe Gastaldo, Product and R&D Director, UnitySC, at IWLPC, who filled me in on the details. […]
October 23, 2017
New Facility Enhances Company’s Semiconductor Process Control Capabilities and Supports Growing North America Customer Base
Austin, Texas – Oct. 23, 2017 – UnitySC today announced at the International Wafer Level Packaging Conference (IWLPC) in San Jose, Calif., the opening of Unity Semiconductor Inc., the company’s new global software development center and North America customer demonstration lab located in Austin, Texas. The new facility serves as the company’s main center for software development, and will house the full line of UnitySC metrology and inspection tools. This equipment will provide a demo lab that supports UnitySC’s North America customer base, augmenting the primary demo lab at the company’s global headquarters, located in Grenoble, France.
Blog post from Philippe Gastaldo, Product and R&D Director, UnitySC.
As the automotive electronics market continues to grow, spurred by developments such as semi-autonomous and fully autonomous vehicles, the demand is increasing for power semiconductor components with sophisticated conversion schemes that decrease power consumption and heat. To address these needs, power semiconductor manufacturers are turning to thin wafers.
Today’s power semiconductors are manufactured primarily on 200-mm wafers that range in thickness from 50 to 100 µm, but their roadmaps are targeting wafers as thin as 1 µm. These wafers are thinned on the backside by mechanical polishing. Defects resulting from the polishing process include grinding marks, grinding failures resulting in edge chips, star cracks and comets formed by edge particles that get caught in the grinding wheel, embedded particles, cleavage lines, and a variety of other imperfections [Evaluation Engineering].
Article published by UnitySC in Chip Scale Review (July-Aug 2017, Volume 21, Number 4)
With the increase of costs, delays and complexity at the most advanced frontend silicon technology nodes, advanced packaging process control solutions have become a key differentiator for achieving next-generation requirements, and thereby continued sustainability in the semiconductor industry. Within the advanced packaging realm, fan-out wafer level packaging (FOWLP) is gaining momentum due to its high integration, extreme flexibility, performance enablement and cost advantages, compared with more conventional assembly technologies.
Despite the wide adoption of FOWLP during the last few years, there are several challenges remaining about the industrialization of the process. For example, regardless of the FOWLP methodology used, the epoxy molding compound (EMC) is still a potential source of issues, with challenges in total thickness variation (TTV) management, package warpage and die shift. From a pure metrology perspective, the EMC thickness measurement may also be a challenge, because the epoxy material typically becomes opaque above a certain thickness and cannot be measured in the visible or infrared domains by conventional optical metrology techniques.
In this article, we introduce the various metrology technologies used to control the FOWLP process and review the main metrology measurements required during high-volume manufacturing. Additionally, we explore the advantages of using an inline, integrated 2D/3D metrology solution to characterize the FOWLP fabrication process using the chip-first/face-down approach.