Through Silicon Vias (TSV) to vertically connect chips is a complementary approach to traditional CMOS downscaling to deliver more efficient systems with smaller footprint. Initially used for applications such as Image sensors, MEMS and RF filters, new applications recently emerged requiring higher density of TSV to enable 2.5D and 3DIC system integration. For a couple of years, via middle type of TSV gained traction for applications such as memory stacks and combination of memory and CPU/GPU or FPGA on interposers. These applications are supporting high performance demanding markets such as gaming, high performance computing, augmented & virtual reality, artifical intelligence. To enable reliable and cost effective manufacturing of such devices, UnitySC pionneered the metrology space by providing the best-in class solution.
UnitySC developed a metrology solution to support 2.5 and 3D integration with TSV. Combining several optical sensors and technologies, the TMAP Series is the most suitable and complete metrology solution from TSV etch to reveal all the way to 3D stacking.
List of measurements performed with TMap Series includes via depth and diameter without any via aspect ratio limitation, remaining silicon thickness before backside via reveal, Cu nails height and CD, crack and void inspection.
UnitySC’s TMAP Series for TSV has been shipped to customers since 2013. Installed base includes equipment at major IDMs, foundries, OSAT, RTOs.
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